Posted 15 Oct · 63 open roles
CPU Senior Floor Plan Engineer
India, BangaloreonsiteApply by 6 Nov 2026
- Undisclosed
- Salary
- 3+ yrs
- Experience
- Full time
- Job type
Skills this role mentions
- Go
About the role
Job Description
The Role and Impact Defines the physical dimensions of the CPU IP with consideration for overall product costs such as die size optimization, die per reticle/good die per wafer maximization, and right technology selection as it pertains to metal layers and reuse strategy across different SKUs in a product family. Performs integration of all dies in a package and completes the relevant checks before tape out. Creates and physical database for the IP. Collaborates with architects to optimize the placement of IPs for latency as well as die area/aspect ratio. Creates specifications and collaterals for the IP blocks to execute the floorplan and automatic place and route (APR)…
Full details and the application are on Intel's careers site.
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