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Cisco

Posted 17 Sept · 150 open roles

Leader/Manager, ASIC Design Verification Engineering || Verilog, UVM, TestBench, Technical Leadership, Hardware Emulation, SOC || Exp - 15 + years

Bangalore, IndiaonsiteApply by 30 Oct 2026

Undisclosed
Salary
13+ yrs
Experience
Full time
Job type

About the role

Meet the Team Come join us and be part of the Cisco SiliconOne team and take part in crafting Cisco's groundbreaking Enterprise and Service Provider solutions by crafting some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a rare combination of a startup culture with the benefits of working for the top tier networking company in the world!

Full details and the application are on Cisco's careers site.

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Cisco

150 open roles

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What tech interviews usually cover

Common rounds for engineering roles. Every company runs its own process.

  1. Round 1

    Fundamentals

    Coding, data structures and problem solving, usually 45–60 minutes.

  2. Round 2

    Design and depth

    System or component design, plus the tools named in the posting.

  3. Round 3

    Team fit

    Past projects, how you work with others, and the offer conversation.

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